The digital phase locked loop (PLL) produces an output pulse stream or clock pulses that are related in frequency to a reference clock input. This requires a digital phase comparator which produces a d-c output in proportion to the phase difference between the output and reference clock pulses. This d-c output is used to control the frequency of a voltage controlled oscillator which generates the output clock pulses. Typically, the phase comparator is combined with a charge pump that acts to set the voltage developed across a loop filter capacitor. When current is pumped into the capacitor its d-c voltage rises and when current is pumped out the voltage falls. This loop filter capacitor is connected to the VCO to set its frequency. Such an arrangement can have a dead band range in which the VCO can change phase without producing sufficient phase comparator output to activate the up/down charging mechanism. Thus, the VCO can dither within the dead band and this reduces the spectral purity of the oscillator signal.
One way to avoid such a dead band is set forth in a paper titled AN ECL/I.sup.2 L FREQUENCY SYNTHESIZER FOR AM/FM RADIO WITH AN ALIVE ZONE PHASE COMPARER, by Donald R. Preslar and Joseph F. Siwinski This paper was published in the August, 1981 issue of IEEE Transactions on Consumer Electronics, pages 220-226. The teaching in this publication is incorporated herein by reference. The paper shows a conventional digital phase comparator in which a delay element is incorporated in the reset circuit. This results in both the up and down charge pumps being on for zero phase error. Such an action ensures that there is no appreciable dead band and the result is called an alive zone comparator.
The main problem is that the delay must be made longer than the turn-on time of the charge pump. This time is determined by such variables as temperature, fabrication process, and the charge pump output voltage. Accordingly, the delay is normally made longer than the worst case turn-on time and this renders the period of time, during which both the charge and discharge currents are both on, excessive. This can lead to a phase error when the charge and discharge currents are not exactly equal.